SL9RT Intel Xeon 5160 3.00GHZ 4M 1333 LGA771

SL9RT Intel Xeon 5160 3.00GHZ 4M 1333 LGA771

  • Family: Intel Xeon
  • Processor number: 5160
  • Processor markings: 3.00GHZ/4M/1333
  • Frequency: 3 GHz
  • Bus speed: 1.333 GHz
  • Package type: 771-land FC-LGA6/mLGA
  • Socket type: Socket 771 (LGA771)
  • CPUID: 06F6h
  • Core stepping: B2
  • Processor core: Woodcrest
  • Manufacturing technology: 0.065 micron
  • The number of cores: 2
  • L2 cache size: 4 MB
  • Features:
    • EM64T technology
    • Enhanced SpeedStep technology
    • Execute disable bit
    • Thermal Monitor
    • Virtualization technology
  • Case temperature: 56.5°C
  • Interposer revision: 01
  • Notes on sSpec SL9RT:
    • This part has Enhanced Halt State enabled.
  • Vendor: GenuineIntel
  • Processor name (BIOS): Intel(R) Xeon(R) CPU 5160 @ 3.00GHz
  • Cores: 2
  • Logical processors: 2
  • Processor type: Original OEM Processor
  • CPUID signature: 6F6
  • Family: 6 (06h)
  • Model: 15 (0Fh)
  • Stepping: 6 (06h)
  • TLB/Cache details:
    • 3rd-level cache: 4-MB, 16-way set associative, 64-byte line size (Intel Xeon processor MP, Family 0Fh, Model 06h), 2nd-level cache: 4-MB, 16-way set associative, 64-byte line size
    • 64-byte Prefetching
    • Data TLB: 4-KB Pages, 4-way set associative, 256 entries
    • Data TLB: 4-MB Pages, 4-way set associative, 32 entries
    • Instruction TLB: 2-MB pages, 4-way, 8 entries or 4M pages, 4-way, 4 entries
    • Instruction TLB: 4-KB Pages, 4-way set associative, 128 entries
    • L1 Data TLB: 4-KB pages, 4-way set associative, 16 entries
    • L1 Data TLB: 4-MB pages, 4-way set associative, 16 entries
  • Instruction set extensions
    • MMX
    • SSE
    • SSE2
    • SSE3
    • SSSE3
  • Additional instructions
    • CLFLUSH
    • CMOV
    • CMPXCHG16B
    • CMPXCHG8B
    • FXSAVE/FXRSTORE
    • MONITOR/MWAIT
    • SYSENTER/SYSEXIT
  • Integrated features and technologies
  • Major features
    • On-chip Floating Point Unit
    • 64-bit / Intel 64
    • NX bit/XD-bit
    • Intel Virtualization
    • Enhanced SpeedStep
  • Other features
    • 36-bit page-size extensions
    • 64-bit debug store
    • Advanced programmable interrupt controller
    • CPL qualified debug store
    • Debug store
    • Debugging extensions
    • Digital Thermal Sensor capability
    • Direct Cache access
    • LAHF/SAHF support in 64-bit mode
    • Machine check architecture
    • Machine check exception
    • Memory-type range registers
    • Model-specific registers
    • Page attribute table
    • Page global extension
    • Page-size extensions (4MB pages)
    • Pending break enable
    • Perfmon and Debug capability
    • Physical address extensions
    • Self-snoop
    • Thermal monitor
    • Thermal monitor 2
    • Thermal monitor and software controlled clock facilities
    • Time stamp counter
    • Virtual 8086-mode enhancements
    • xTPR Update Control